The invention relates to voltage regulators and more particularly to a voltage regulator to be fabricated as a part of an integrated circuit chip to internally provide the regulated power required for the operation of the chip.
Integrated circuit chips are well known. They require for their operation predetermined regulated voltages. Such regulated voltages are conventionally provided by an outside source; however there has been found to be a problem when using such outside sources for particular integrated circuit applications as for example when there is a further requirement for using such chip for monitoring of the output of such an external power supply.
A P-channel MOSFET will be used as an example to illustrate the problem. Conventionally in a P-channel MOSFET, the P-well source and drain are imbedded in an N substrate material. For operation, the N substrate is connected to a positive power supply voltage and the source and drain must be connected to a less positive potential, since the known diode effect created at the source-substrate junction and the drain-substrate junction between the P-well material and the N substrate material prevents the application of a voltage more positive than the substrate to the source or drain of any P-channel FET.
In many environments, it may be desirable to monitor both regulated and unregulated voltages provided by an external source for providing power-up and power-down signals or for signalling a power interruption of any sort. However, the voltages to be monitored are those which are typically required to power the monitoring chip itself. It is therefore extremely important that the monitoring chip be operational prior to the application of a regulated voltage to any other device and it is important to insure that the regulated voltage to the chip always be, again in the case of a P-channel MOSFET as an example, more positive than the voltage applied to the source or drain of any P-channel FET on the chip.
Various techniques have been used to assure that such inappropriate potentials cannot occur, but there has still been found to be the possibility of a potential latching of the MOSFETs because the substrate on power-up or power-down may become less positive than voltages applied to the source or drain of any MOSFETs on the chip.
For example, U.S. Pat. No. 4,347,476 issued to Tam entitled VOLTAGE-TEMPERATURE INSENSITIVE ON-CHIP REFERENCE VOLTAGE SOURCE COMPATIBLE WITH VLSI MANUFACTURING TECHNIQUES shows a reference voltage source which is temperature and voltage insensitive. Gilbert, et al., in U.S. Pat. No. 4,313,083 entitled TEMPERATURE COMPENSATED IC VOLTAGE REFERENCE also shows a temperature compensated IC voltage reference. Hoff, Jr., U.S. Pat. No. 4,100,437 entitled MOS REFERENCE VOLTAGE CIRCUIT shows a stable reference circuit which is stable for both temperature and power supply variations including variations in a substrate biasing potential.
U.S. Pat. No. 4,473,758 to Huntington entitled SUBSTRATE BIAS CONTROL CIRCUIT AND METHOD teaches a substrate bias control method utilizing MOSFET devices to control the application of potentials to the chip.
Therefore, it is an object of the invention to provide an integrated circuit chip power supply which is operational before any other regulated supply has reached a nominal voltage. This means that the integrated circuit chip may be used to monitor other voltages and may be used for critical signal controls.
It is a further object to have an integrated circuit chip be operational for a predetermined period of time after other regulated power supplies are powered down.
It is another object of the invention to provide an integrated circuit chip which has a regulated voltage power supply which may be used when no other regulated voltage power supply is available.
It is another object to provide an integrated circuit chip with power supply of which is isolated from other regulated power supplies.